Fix for T14251 on ARM
Concern Raisedd8495549ba9d

Authored by kavon on Oct 28 2018, 11:11 AM.


Fix for T14251 on ARM

We now calculate the SSE register padding needed to fix the calling
convention in LLVM in a robust way: grouping them by whether
registers in that class overlap (with the same class overlapping

My prior patch assumed that no matter the platform, physical
register Fx aliases with Dx, etc, for our calling convention.

This is unfortunately not the case for any platform except x86-64.

Test Plan:
Only know how to test on x86-64, but it should be tested on ARM with:

make test WAYS=llvm && make test WAYS=optllvm

Reviewers: bgamari, angerman

Reviewed By: bgamari

Subscribers: rwbarton, carter

GHC Trac Issues: Trac #15780, Trac #14251, Trac #15747

Differential Revision:

bgamari raised a concern with this commit.Oct 28 2018, 11:07 PM
bgamari added a subscriber: bgamari.

This appears to break out ability to build GHC using the LLVM backend.


This commit now has outstanding concerns.Oct 28 2018, 11:07 PM