Fix for T14251 on ARM

Authored by kavon on Oct 28 2018, 11:11 AM.

Description

Fix for T14251 on ARM

We now calculate the SSE register padding needed to fix the calling
convention in LLVM in a robust way: grouping them by whether
registers in that class overlap (with the same class overlapping
itself).

My prior patch assumed that no matter the platform, physical
register Fx aliases with Dx, etc, for our calling convention.

This is unfortunately not the case for any platform except x86-64.

Test Plan:
Only know how to test on x86-64, but it should be tested on ARM with:

make test WAYS=llvm && make test WAYS=optllvm

Reviewers: bgamari, angerman

Reviewed By: bgamari

Subscribers: rwbarton, carter

GHC Trac Issues: Trac #15780, Trac #14251, Trac #15747

Differential Revision: https://phabricator.haskell.org/D5254

(cherry picked from commit c36a2b596a6ba9d7a0a80df01b3c041720c727ca)