Multiple fixes / improvements for LLVM backend
ClosedPublic

Authored by kavon on Sep 30 2018, 7:03 PM.

Details

Summary
  • Fix for Trac #13904 -- stop "trashing" callee-saved registers, since it is not actually doing anything useful.
  • Fix for Trac #14251 -- fixes the calling convention for functions passing raw SSE-register values by adding padding as needed to get the values in the right registers. This problem cropped up when some args were unused an dropped from the live list.
  • Fixed a typo in 'readnone' attribute
  • Added 'lower-expect' pass to level 0 LLVM optimization passes to improve block layout in LLVM for stack checks, etc.
Test Plan

make test WAYS=optllvm and make test WAYS=llvm

Diff Detail

Repository
rGHC Glasgow Haskell Compiler
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kavon created this revision.Sep 30 2018, 7:03 PM
kavon updated this revision to Diff 18155.Sep 30 2018, 7:10 PM

remove redundant isSSE def

kavon retitled this revision from Multiple fixes / improvements for LLVM backend #13904 to Multiple fixes / improvements for LLVM backend.Sep 30 2018, 7:14 PM
kavon updated the Trac tickets for this revision.
angerman accepted this revision.Oct 1 2018, 2:01 AM

LGTM.

This revision is now accepted and ready to land.Oct 1 2018, 2:01 AM
This revision was automatically updated to reflect the committed changes.
bgamari added inline comments.Oct 14 2018, 3:47 AM
compiler/llvmGen/LlvmCodeGen/Base.hs
179

@kavon, is it true that we should be disabling this logic on non-x86 architectures? I'm hitting the i > regNum ?? panic on AArch64.

In general more comments in this area would be helpful.

It turns out that the padding should be slightly different for AArch64, because we use a disjoint set of registers for float and double (although Sx and Dx registers on AArch64 still alias to the Vx register).

Basically, for AArch64 we need to first partition the set of live SSE regs into a float list and a double list, and pad those separately (with their respective type). I can upload a new revision doing this, but I don't know how to test on AArch64.

trofi added a subscriber: trofi.Oct 14 2018, 1:59 PM
trofi added inline comments.
compiler/llvmGen/LlvmCodeGen/Base.hs
179

Seeing the same. Filed a bug: https://ghc.haskell.org/trac/ghc/ticket/15747

@kavon, it would be fantastic if you could provide a patch for this.